Static random access memory (“SRAM”) arrays are commonly used for data storage in integrated circuit devices. Recent advances in fin field effect transistor (“finFET”) technology have made advanced SRAM cells using finFET transistors possible. SRAM array performance is often layout dependent. For example, a position at which an SRAM cell lies in the SRAM array sometimes causes an inner cell of an SRAM array to perform differently compared to an edge cell of the SRAM array. The difference in performance is often caused by a discontinuous cell layout structure of the edge cells. Some SRAM arrays include dummy cells that have P-well and N-well strapping structures to help make overall SRAM performance more uniform. Dummy cells that include strapping structures are sometimes called strap cells.